Audiophile 2496 and AMD

Riku

New member
Have anybody experiences in using this kind of combination???

What motherboard and which chipset do you have?
 
I noticed nobody answered this thread when I was searching, but I have a similar question so I thought I'd reuse it. :)

Basically, after reading the last 'Roll Your Own' article, I'm planning on building the machine recommended: AMD Tbird 1.4, Iwill Motherboard, kt133a chipset. However, now I've been reading NIGHTMARE stories on newsgroups with the via chipset and the audiophile. I have an audiophile, and I obviously don't want to setup a system where it's going to have problems, so my question is....

Does anybody out there use an audiophile 2496 with an AMD Thunderbird, and what motherboard and chipset do you use?...

Thanks,
Ryan
 
yo!

I think it should be alright, I heard that soundcards where only having problems with the earlier AMD's (200-400 range??I think??), I have an 850 cpu etc athlon blah blah, and I don't expect any problems, in fact i was planning on getting an audiophile or the delta 66...

I've heard echo's cards don't work well with AMD's, but I think midiman is a better buy anyways... Good job researching before hand, but I wouldn't worry...if your getting it from a store ask the person your buying it from.

Also I think that once AMD's currently go over around 1000 cpu the difference is minimal or something. so i wouldn't go that high, but do more research...don't take my word definite.
 
M-audio support rocks.
I emailed them with this question and got response within 20 minutes.

Here it is in its entirety for the benefit of our community.

Yes it (Audiophile 2496) works fine on AMD systems but some motherboards with via chip sets need certain files installed.

These are the files you need / usbfilters / 4inonedriver

Some other links to check out http://www.viahardware.com/download/viatweak.shtm
http://www.viahardware.com/download/index.shtm#inf

http://koti.mbnet.fi/parru/

If you are looking CPU-to-PCI Bridge latency timer 0 clks program, get it here (version 1.0.1.3f, ~2KB).
Readme.txt
Description:
This program sets chipset CPU-to-PCI Bridge (PCI bus#0, function#0 and device#0) latency timer to 0 clks (according VIA's documents there is still fixed granularity of 8 clks in MVP3 chipset).
Setting latency timer to 0 might fix graphics card caused sound crackling.

How to use:
Copy program to %WinDir%Start MenuProgramsStartUp (where %WinDir% is drive and directory where Windows is installed), so it's run every time when Windows start (not in safe mode).

Supported OS's and chipset's:
This program work's only in Windows9x. Only VIA MVP3 chipset tested by the author. Program runs and sets PCI bus#0, function#0 and device#0 offset D to 0 all chipset's that support PCI configuration mechanism #1.

Test system:
FIC VA-503+ 1.2a ECN:2600
CL Annihilator (NVIDIA GeForce 256)
SB Live! (CT4670)
Win98SE

v1.0.1.3f (final) (23.3.2001)
No changes in latency.exe.
Added info about W2000 version.

v1.0.1.3
Latency.exe rewritten so that latency timer value can be changed.

v1.0.1.2a
Latency.txt was changed to readme.txt and rewritten & microFAQ added.
No changes in latency.exe.

v1.0.1.2
Made using MASM 6.15. About 47k smaller file.

v1.0.1.1
Made using C++ Builder 4 Pro.

v0.0.0.0-v1.0.1.0
Alpha's Alpha, Alpha, Beta, Beta2, Beta3, RC1, RC2, totally rewritten, Alpha...

MicroFAQ:
Q: Are you going to make Windows 2000 version?
A: No, But Tibor SchØtz has made NT4/W2000 version.
http://www.deinmeister.de/mvp3_zlt.htm (German)
http://www.deinmeister.de/mvp3_zlt_e.htm (English)

Q: 0 clks doesn't work, can you sent me latency.exe with different value?
A: You can get different latency timer value by little hex-editing, instructions:
Get a hex-editor and change byte in offset 413H to desired latency value.

Partial source code
mov dx,0CF8H ;dx=configuration address (CFB-CF8)
in eax,dx ;Get current state
mov ecx,eax ;Save current state to ecx
mov eax,08000000cH ;Latency timer's offset is 0DH but we
;get same dword back as offset 0CH
out dx,eax ;Enable configuration space & set offset to register
mov dx,0CFCH ;dx=configuration data (CFF-CFC)
in eax,dx ;Get current data
mov ah, 00H ;Latency timer value
mov dx,0CFCH
out dx,eax ;Set new latency to the chipset
mov dx,0CF8H
mov eax,ecx
out dx,eax ;restore orginal conf.add. data
xor eax,eax

Jari Korhonen
parru@mbnet.fi
http://koti.mbnet.fi/parru/


Jesper
 
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